ClearCore Library
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CcioBoardManager.h
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1/*
2 * Copyright (c) 2020 Teknic, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
33#ifndef __CCIOBOARDMANAGER_H__
34#define __CCIOBOARDMANAGER_H__
35
36#include <stddef.h>
37#include <stdint.h>
38#include "CcioPin.h"
39#include "SerialDriver.h"
40#include "SysConnectors.h"
41#include "SysTiming.h"
42
43namespace ClearCore {
44
46#define CCIO_PINS_PER_BOARD 8
47#ifndef MAX_CCIO_DEVICES
50#define MAX_CCIO_DEVICES 8
54#define CCIO_PIN_CNT (CCIO_PINS_PER_BOARD * MAX_CCIO_DEVICES)
55#endif
56
59#ifndef MAX_FLUSH_ATTEMPTS
60#define MAX_FLUSH_ATTEMPTS 4
61#endif
62
65#ifndef MAX_GLITCH_LIM
66#define MAX_GLITCH_LIM 4
67#endif
68
71#ifndef CCIO_OVERLOAD_TRIP_TICKS
72#define CCIO_OVERLOAD_TRIP_TICKS ((uint8_t)(2.4 * MS_TO_SAMPLES))
73#endif
76#ifndef CCIO_OVERLOAD_FOLDBACK_TICKS
77#define CCIO_OVERLOAD_FOLDBACK_TICKS (100 * MS_TO_SAMPLES)
78#endif
92 friend class SysManager;
93 friend class CcioPin;
94
95public:
96#ifndef HIDE_FROM_DOXYGEN
100 static CcioBoardManager &Instance();
101#endif
102
119
131 void PinState(ClearCorePins pinNum, bool newState);
132
159 void OutputPulsesStart(ClearCorePins pinNum, uint32_t onTime,
160 uint32_t offTime, uint16_t pulseCount = 0,
161 bool blockUntilDone = false);
178 void OutputPulsesStop(ClearCorePins pinNum, bool stopImmediately = true);
179
194 volatile const uint64_t &OutputPulsesActive() {
195 return m_pulseActive;
196 }
197
217 uint8_t CcioDiscover(SerialDriver *comInstance);
218
219#ifndef HIDE_FROM_DOXYGEN
228 void LinkClose();
229#endif
230
246 volatile const uint8_t &CcioCount() {
247 return m_ccioCnt;
248 }
249
261 volatile const bool &LinkBroken() {
262 return m_ccioLinkBroken;
263 }
264
277 volatile const uint64_t &IoOverloadRT() {
278 return m_ccioOverloaded;
279 }
280
292 uint64_t IoOverloadAccum();
293
305 volatile const uint64_t &IoOverloadSinceStartupAccum() {
306 return m_overloadSinceStartupAccum;
307 }
308
322 uint64_t InputsRisen(uint64_t mask = UINT64_MAX);
323
337 uint64_t InputsFallen(uint64_t mask = UINT64_MAX);
338
349 volatile const uint64_t &InputState() {
350 return m_filteredInputs;
351 }
352
363 volatile const uint64_t &OutputState() {
364 return m_lastOutputs;
365 }
366
382 void CcioRediscoverEnable(bool enable);
383
397
404 uint8_t RefreshRate() {
405 uint8_t cnt = CcioCount();
406 return (cnt > 1) ? (cnt >> 1) : 1;
407 }
408
409private:
410 union CcioBuf {
411 struct __attribute__((packed)) {
412 uint8_t writeMarker;
413 uint64_t inputs;
414 uint64_t outputsSwapped;
415 uint8_t readMarker;
416 } buf64;
417 uint8_t buf8[2 * MAX_CCIO_DEVICES + 2];
418 CcioBuf() {
419 Clear();
420 }
421 void Clear() {
422 buf64.writeMarker = 0;
423 buf64.inputs = 0;
424 buf64.outputsSwapped = 0;
425 buf64.readMarker = 0;
426 };
427 };
428
429 typedef enum {
430 CCIO_SEARCH,
431 CCIO_TEST,
432 CCIO_FOUND
433 } CcioDiscoverState;
434
435 CcioBuf m_writeBuf;
436 CcioBuf m_readBuf;
437
438 // Reference for the discovery state of the CCIO-8 link network
439 CcioDiscoverState m_discoverState;
440
441 // Reference to serial port
442 SerialDriver *m_serPort;
443 // CCIO-8 Device Count
444 uint8_t m_ccioCnt;
445 // Refresh rate
446 uint8_t m_ccioRefreshRate;
447 // Refresh delay
448 uint8_t m_ccioRefreshDelay;
449 // Currently overloaded outputs
450 uint64_t m_throttledOutputs;
451
452 // Storage for inputs/outputs (max 64 pins to a serial port)
453 // LSB corresponds to 1st pin on 1st CCIO-8 in the chain
454 uint64_t m_currentInputs;
455 uint64_t m_filteredInputs;
456 uint64_t m_currentOutputs;
457 uint64_t m_outputMask;
458 uint64_t m_lastOutputsSwapped;
459 // copy of last outputs sent, prior to any swapping or throttling
460 uint64_t m_lastOutputs;
461 uint64_t m_outputsWithThrottling;
462 uint64_t m_ccioMask; // mask for active CCIOs
463
464 // Pulse out control variables
465 uint64_t m_pulseActive;
466 uint64_t m_pulseValue;
467 uint64_t m_pulseStopPending;
468
469 uint16_t m_consGlitchCnt; // count of consecutive glitches detected
470 bool m_ccioLinkBroken;
471 uint64_t m_ccioOverloaded;
472 uint64_t m_ccioOverloadAccum;
473 uint64_t m_overloadSinceStartupAccum;
474 uint64_t m_inputRegRisen;
475 uint64_t m_inputRegFallen;
476 uint32_t m_faultLed;
477 bool m_autoRediscover;
478 uint32_t m_lastDiscoverTime;
479
480 CcioPin m_ccioPins[CCIO_PIN_CNT];
481
485 CcioBoardManager();
486
490 void Initialize();
491
495 void Refresh();
496
500 void RefreshSlow();
501
505 void IoOverloadRT(uint64_t overloadState);
506
507 /*
508 Fill a buffer with len bytes of the given val
509 */
510 static void FillBuffer(uint8_t *buf, uint8_t len, uint8_t val) {
511 uint8_t i;
512 for (i = 0; i < len; i++) {
513 *buf++ = val;
514 }
515 }
516
517 /*
518 Return true if all entries are equal to val
519 */
520 static bool AllEntriesEqual(const uint8_t *buf, uint8_t len, uint8_t val) {
521 uint8_t i;
522 for (i = 0; i < len; i++) {
523 if (buf[i] != val) {
524 return false;
525 }
526 }
527 return true;
528 }
529
530}; // CcioBoardManager
531
532} // ClearCore namespace
533
534#endif // __CCIOBOARDMANAGER_H__
#define CCIO_PIN_CNT
Definition CcioBoardManager.h:54
#define MAX_CCIO_DEVICES
Definition CcioBoardManager.h:50
Connector class for an individual CCIO-8 pin.
ClearCorePins
ClearCore PIN definitions.
Definition SysConnectors.h:54
ClearCore timing profiling utility functions.
ClearCore I/O Expansion Board Manager Class.
Definition CcioBoardManager.h:91
void OutputPulsesStart(ClearCorePins pinNum, uint32_t onTime, uint32_t offTime, uint16_t pulseCount=0, bool blockUntilDone=false)
Start an output pulse.
volatile const uint64_t & OutputState()
Accessor for all the CCIO-8 pins' output states.
Definition CcioBoardManager.h:363
volatile const uint64_t & IoOverloadSinceStartupAccum()
Accessor for all the CCIO-8 pins' accumulated overload states.
Definition CcioBoardManager.h:305
void CcioRediscoverEnable(bool enable)
Enable or Disable the automatic rediscover function.
uint64_t InputsRisen(uint64_t mask=UINT64_MAX)
Clear on read accessor for rising input edges.
CcioPin * PinByIndex(ClearCorePins connectorIndex)
Accessor for the individual CCIO-8 pin connectors.
volatile const uint8_t & CcioCount()
Accessor for the number of CCIO-8 boards connected to the ClearCore.
Definition CcioBoardManager.h:246
volatile const uint64_t & InputState()
Accessor for all the CCIO-8 pins' filtered input states.
Definition CcioBoardManager.h:349
uint8_t CcioDiscover(SerialDriver *comInstance)
Polls for and discovers all CCIO-8 boards connected to the ClearCore.
void PinState(ClearCorePins pinNum, bool newState)
Write the digital state to the specified CCIO-8 pin.
uint64_t InputsFallen(uint64_t mask=UINT64_MAX)
Clear on read accessor for falling input edges.
void OutputPulsesStop(ClearCorePins pinNum, bool stopImmediately=true)
Stop an output pulse.
volatile const bool & LinkBroken()
Accessor for the CCIO-8 link status.
Definition CcioBoardManager.h:261
uint8_t RefreshRate()
Accessor for the CCIO-8 link refresh rate.
Definition CcioBoardManager.h:404
uint64_t IoOverloadAccum()
Accessor for all the CCIO-8 pins' accumulated overload states.
volatile const uint64_t & IoOverloadRT()
Accessor for all the CCIO-8 pins' overloaded states.
Definition CcioBoardManager.h:277
bool PinState(ClearCorePins pinNum)
Read the digital state of the specified CCIO-8 pin.
volatile const uint64_t & OutputPulsesActive()
Check the output pulse state.
Definition CcioBoardManager.h:194
Connector class for an individual CCIO-8 pin.
Definition CcioPin.h:53
ClearCore Serial UART/SPI Connector class.
Definition SerialDriver.h:55
ClearCore Board Supervisory System Manager.
Definition SysManager.h:58
Namespace to encompass the ClearCore board API.
Definition AdcManager.h:36