32 #ifndef __INPUTMANAGER_H__ 33 #define __INPUTMANAGER_H__ 67 #ifndef HIDE_FROM_DOXYGEN 149 #ifndef HIDE_FROM_DOXYGEN 161 void InterruptEnable(int8_t extInt,
bool enable,
bool clearPending =
false);
196 return m_interruptsEnabled;
199 #ifndef HIDE_FROM_DOXYGEN 215 bool InterruptHandlerSet(int8_t extInt,
219 bool oneTime =
false);
240 void EIC_Handler(uint8_t index);
244 volatile uint32_t *m_inputPtrs[CLEARCORE_PORT_MAX];
245 uint32_t m_inputsUnfiltered[CLEARCORE_PORT_MAX];
246 uint32_t m_inputsUnfilteredChanges[CLEARCORE_PORT_MAX];
260 uint32_t m_interruptsMask;
262 bool m_interruptsEnabled;
264 voidFuncPtr m_interruptServiceRoutines[EIC_NUMBER_OF_INTERRUPTS];
266 uint16_t m_oneTimeFlags;
268 #ifndef HIDE_FROM_DOXYGEN 275 void SetInputRegisters(
volatile uint32_t *a,
276 volatile uint32_t *b,
277 volatile uint32_t *c);
284 #endif // !HIDE_FROM_DOXYGEN
ClearCore ARM Serial Port base class.
Definition: SerialBase.h:66
Defines the Peripheral Route structure, used in HardwareMapping.
ClearCore digital input connector class.
Definition: DigitalIn.h:70
Namespace to encompass the ClearCore board API.
Definition: AdcManager.h:36
Definition: SysConnectors.h:174
void(* voidFuncPtr)(void)
Definition: DigitalIn.h:43