ClearCore Library
SerialBase.h
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22 
32 #ifndef __SERIALBASE_H__
33 #define __SERIALBASE_H__
34 
35 #include <stdint.h>
36 #include <sam.h>
37 #include "DmaManager.h"
38 #include "ISerial.h"
39 #include "PeripheralRoute.h"
40 
41 namespace ClearCore {
42 
44 #ifndef SERIAL_BUFFER_SIZE
45 #define SERIAL_BUFFER_SIZE 64
46 #endif
47 
49 #ifndef SERCOM_NVIC_RX_PRIORITY
50 #define SERCOM_NVIC_RX_PRIORITY (static_cast<IRQn_Type>(1))
51 #endif
52 
53 #ifndef SERCOM_NVIC_TX_PRIORITY
54 #define SERCOM_NVIC_TX_PRIORITY (static_cast<IRQn_Type>(1))
55 #endif
56 
57 #ifndef SERCOM_NVIC_ERR_PRIORITY
58 #define SERCOM_NVIC_ERR_PRIORITY (static_cast<IRQn_Type>(7))
59 #endif
60 
66 class SerialBase : public ISerial {
67  friend class TestIO;
68 
69 public:
74  static const int16_t BREAK_DETECTED = int16_t(0xBDBD);
75 
79  static const int16_t EOB = -1;
80 
90  uint32_t reg;
91 
95  struct {
99  uint32_t SerialFrameError : 1;
103  uint32_t SerialParityError : 1;
107  uint32_t SerialOverflowError : 1;
108  } bit;
109 
114  reg = 0;
115  }
116 
121  reg = val;
122  }
123 
128  operator bool() const {
129  return reg > 0;
130  }
131  };
132 
136  typedef enum {
141  } DataOrders;
142 
146  typedef enum {
151  } PortModes;
152 
156  typedef enum {
158  SCK_LOW = 0,
162 
166  typedef enum {
171  } SpiClockPhases;
172 
176  typedef enum {
183  } CtrlLineModes;
184 
185  // ======================= MODE INDEPENDENT API ============================
200  bool PortMode(PortModes newMode);
201 
202  // ========================== ISerial API =================================
206  void Flush() override;
210  void FlushInput() override;
211 
215  virtual void PortOpen() override;
216 
220  virtual void PortClose() override;
221 
226  virtual bool Speed(uint32_t bitsPerSecond) override;
227 
231  virtual uint32_t Speed() override {
232  return m_baudRate;
233  }
234 
238  int16_t CharGet() override;
239 
243  int16_t CharPeek() override;
244 
248  bool SendChar(uint8_t charToSend) override;
249 
253  int32_t AvailableForRead() override;
254 
258  int32_t AvailableForWrite() override;
259 
263  void WaitForTransmitIdle() override;
264 
268  bool PortIsOpen() override;
269 
282  void FlowControl(bool useFlowControl);
283 
295  bool FlowControl() {
296  return m_flowControl;
297  };
298 
313  bool RtsMode(CtrlLineModes mode);
314 
326  bool CtsState();
327 
339  void SerialBreak(bool enable);
340 
352  bool Parity(Parities newParity) override;
353 
365  Parities Parity() override {
366  return m_parity;
367  }
368 
377  bool StopBits(uint8_t bits) override;
378 
390  bool CharSize(uint8_t size) override;
391 
392 #ifndef HIDE_FROM_DOXYGEN
393 
396  operator bool() override {
397  return true;
398  }
399 #endif
400 
401  // =============================== SPI API =================================
402 
411  void SpiClock(SpiClockPolarities polarity, SpiClockPhases phase);
412 
425  bool SpiSsMode(CtrlLineModes mode);
426 
430  uint8_t SpiTransferData(uint8_t data);
431 
447  int32_t SpiTransferData(
448  uint8_t const *writeBuf, uint8_t *readBuf, int32_t len);
449 
466  uint8_t const *writeBuf, uint8_t *readBuf, int32_t len);
467 
473  bool SpiAsyncWaitComplete();
474 
475  // ============================= SETUP API =================================
476 
482  void DataOrder(DataOrders newOrder);
483 
484  // ========================= ERROR HANDLING API ============================
489  void HandleFrameError();
490 
495  void HandleParityError();
496 
501  void HandleOverflow();
502 
529  UINT32_MAX);
530 
531 #ifndef HIDE_FROM_DOXYGEN
532  //========================= INTERRUPT HANDLERS =============================
533 
539  void IrqHandlerTx();
543  void IrqHandler1();
549  void IrqHandlerRx();
555  void IrqHandlerException();
556 #endif
557 
558 protected:
559  // Current format
560  Parities m_parity;
561  uint8_t m_stopBits;
562  uint8_t m_charSize;
563  PortModes m_portMode;
564  SpiClockPolarities m_polarity;
565  SpiClockPhases m_phase;
566  CtrlLineModes m_ssMode;
567  CtrlLineModes m_rtsMode;
568  bool m_flowControl;
569 
570  // SERCOM instance
571  Sercom *m_serPort;
572 
573  // Pin information
574  const PeripheralRoute *m_ctsMisoInfo;
575  const PeripheralRoute *m_rtsSsInfo;
576  const PeripheralRoute *m_rxSckInfo;
577  const PeripheralRoute *m_txMosiInfo;
578 
579  uint32_t m_baudRate;
580  uint8_t m_peripheral;
581  // Port open/close state
582  bool m_portOpen;
583  // Serial Break state
584  bool m_serialBreak;
585  // SERCOM DRE interrupt number
586  IRQn_Type m_dreIrqN;
587  // SPI dma channels
588  DmaChannels m_dmaRxChannel;
589  DmaChannels m_dmaTxChannel;
590 
594  SerialBase(const PeripheralRoute *ctsMisoInfo,
595  const PeripheralRoute *rtsSsInfo,
596  const PeripheralRoute *rxSckInfo,
597  const PeripheralRoute *txMosiInfo,
598  uint8_t peripheral);
599 
604  SerialBase() {};
605 
609  void WaitOneCharTime();
610 
611  // =========================== INTERRUPT API ===============================
615  void EnableDreInterruptUart();
619  void DisableDreInterruptUart();
623  void EnableRxcInterruptUart();
627  void DisableRxcInterruptUart();
628 
629 private:
630  // Serial Buffers
631  int16_t m_bufferIn[SERIAL_BUFFER_SIZE];
632  int16_t m_bufferOut[SERIAL_BUFFER_SIZE];
633  // Indices for head and tails of the ring buffers
634 
635  volatile uint32_t m_inHead, m_inTail;
636  volatile uint32_t m_outHead, m_outTail;
637 
638  // Clear-on-read accumulating error register.
639  SerialErrorStatusRegister m_errorRegAccum;
640 
645  void PortEnable(bool initializing = false);
646  void PortDisable();
647 
651  uint32_t NextIndex(uint32_t currentIndex) {
652  return ((currentIndex + 1) & (SERIAL_BUFFER_SIZE - 1));
653  }
654 
659  void RxProc();
660 
664  void TxPump();
665 
669  bool RtsSsPinState(CtrlLineModes mode);
670 };
671 
672 } // ClearCore namespace
673 #endif // __SERIALBASE_H__
bool SpiSsMode(CtrlLineModes mode)
Change the SPI Slave Select mode.
Base class for interacting with all ClearCore serial.
Definition: ISerial.h:50
A standardized ClearCore Serial interface.
enum ClearCore::ISerial::_Parities Parities
ClearCore ARM Serial Port base class.
Definition: SerialBase.h:66
uint32_t reg
Definition: SerialBase.h:90
bool StopBits(uint8_t bits) override
bool RtsMode(CtrlLineModes mode)
Change the serial RTS mode.
int32_t AvailableForRead() override
Defines the Peripheral Route structure, used in HardwareMapping.
uint8_t SpiTransferData(uint8_t data)
SerialErrorStatusRegister()
Definition: SerialBase.h:113
uint32_t SerialOverflowError
Definition: SerialBase.h:107
bool FlowControl()
Return whether UART CTS/RTS flow control is enabled.
Definition: SerialBase.h:295
void SerialBreak(bool enable)
Initiate a Serial Break.
Serial Peripheral Interface (SPI) mode.
Definition: SerialBase.h:150
SerialErrorStatusRegister ErrorStatusAccum(SerialErrorStatusRegister mask=UINT32_MAX)
Accumulating clear on read accessor for any error status bits that were asserted sometime since the p...
Leading edge samples, trailing edge changes.
Definition: SerialBase.h:168
SpiClockPolarities
Definition: SerialBase.h:156
SpiClockPhases
Definition: SerialBase.h:166
struct ClearCore::SerialBase::SerialErrorStatusRegister::@4 bit
Leading edge changes, trailing edge samples.
Definition: SerialBase.h:170
Universal Asynchronous Receiver-Transmitter (UART) mode.
Definition: SerialBase.h:148
SCK is low when idle.
Definition: SerialBase.h:158
PortModes
Definition: SerialBase.h:146
DataOrders
Definition: SerialBase.h:136
SerialErrorStatusRegister(uint32_t val)
Definition: SerialBase.h:120
virtual void PortClose() override
bool SpiTransferDataAsync(uint8_t const *writeBuf, uint8_t *readBuf, int32_t len)
SPI&#39;s asynchronous multi-byte transmit and receive function.
#define SERIAL_BUFFER_SIZE
Definition: SerialBase.h:45
Parities Parity() override
Return current port UART transmission format.
Definition: SerialBase.h:365
int16_t CharPeek() override
Attempt to get the next character from the serial channel without pulling the character out of the bu...
bool CharSize(uint8_t size) override
Change the number of bits in a character.
CtrlLineModes
Definition: SerialBase.h:176
virtual void PortOpen() override
Namespace to encompass the ClearCore board API.
Definition: AdcManager.h:36
void SpiClock(SpiClockPolarities polarity, SpiClockPhases phase)
Change the polarity and phase for the SPI clock.
void WaitForTransmitIdle() override
bool PortIsOpen() override
Return whether or not the port is open.
SCK is high when idle.
Definition: SerialBase.h:160
void Flush() override
Control line is controlled by hardware.
Definition: SerialBase.h:182
uint32_t SerialFrameError
Definition: SerialBase.h:99
void DataOrder(DataOrders newOrder)
Change the data order for the port.
static const int16_t BREAK_DETECTED
Definition: SerialBase.h:74
void FlushInput() override
uint32_t SerialParityError
Definition: SerialBase.h:103
bool SpiAsyncWaitComplete()
Block until asynchronous transfers are completed.
virtual uint32_t Speed() override
Gets the baud rate of the port.
Definition: SerialBase.h:231
Control line is in the OFF state.
Definition: SerialBase.h:178
Most significant bit first.
Definition: SerialBase.h:138
int16_t CharGet() override
Attempt to read the next character from serial channel.
Least significant bit first.
Definition: SerialBase.h:140
Control line is in the ON state.
Definition: SerialBase.h:180
bool CtsState()
Read the serial CTS state.
bool SendChar(uint8_t charToSend) override
Send an ascii character on the serial channel.
bool PortMode(PortModes newMode)
Setup the port mode.
static const int16_t EOB
Definition: SerialBase.h:79
int32_t AvailableForWrite() override
Determines the number of characters available in the transmit buffer.
DMA Peripheral Manager for the ClearCore Board.