ClearCore Library
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NvmManager.h
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1/*
2 * Copyright (c) 2020 Teknic, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
28#ifndef __NVMMANAGER_H__
29#define __NVMMANAGER_H__
30
31#include <stdint.h>
32#include <sam.h>
33
34#ifndef HIDE_FROM_DOXYGEN
35namespace ClearCore {
36
55class NvmManager {
56public:
57
61 typedef enum {
62 NVM_LOC_USER_START = 0, // First user-accessible byte after
63 // Microchip's reserved 32 bytes (Section
64 // 9.4 NVM User Page Mapping in the
65 // datasheet)
66
67 NVM_LOC_RESERVED_TEKNIC = 416, // Reserved 64 bytes of data for
68 // Teknic use
69
70 NVM_LOC_USER_MAX = NVMCTRL_PAGE_SIZE - 32, // 480
71
72 NVM_LOC_HW_REVISION = NVM_LOC_USER_MAX - 18, // 462
73 NVM_LOC_SERIAL_NUMBER = NVM_LOC_USER_MAX - 16, // 464
74
75 NVM_LOC_MAC_FIRST = NVM_LOC_USER_MAX - 12, // 468
76 NVM_LOC_MAC_SECOND = NVM_LOC_USER_MAX - 8, // 472
77
78 NVM_LOC_DAC_ZERO = NVM_LOC_USER_MAX - 4, // 476
79 NVM_LOC_DAC_SPAN = NVM_LOC_USER_MAX - 2, // 478
80
81 } NvmLocations;
82
86 static NvmManager &Instance();
87
93 int8_t Byte(NvmLocations nvmLocation);
102 bool Byte(NvmLocations nvmLocation, int8_t newValue);
103
104
112 int16_t Int16(NvmLocations nvmLocation);
122 bool Int16(NvmLocations nvmLocation, int16_t newValue);
123
124
132 int32_t Int32(NvmLocations nvmLocation);
142 bool Int32(NvmLocations nvmLocation, int32_t newValue);
143
152 int64_t Int64(NvmLocations nvmLocationStart);
162 bool Int64(NvmLocations nvmLocationStart, int64_t newValue);
163
171 void BlockRead(NvmLocations nvmLocationStart, int lengthInBytes, uint8_t * const p_data);
172
182 bool BlockWrite(NvmLocations nvmLocationStart, int lengthInBytes, uint8_t const * const p_data);
183
184
193 void MacAddress(uint8_t *macAddress);
194
202 uint32_t SerialNumber();
203
204 bool FinishNvmWrite() {
205 while (m_pageModified || m_writeState != IDLE) {
206 if (WriteCacheToNvmProc()) {
207 continue;
208 }
209 else {
210 return false;
211 }
212 }
213 return true;
214 }
215
216 bool Synchonized() const {
217 return !m_pageModified;
218 }
219
220private:
221
222 typedef enum {
223 IDLE,
224 CLEAR_PAGE_BUFFER,
225 ERASE_PAGE,
226 WRITE_DATA,
227 } WriteCacheState;
228
229 // Page cache is a byte array.
230 int8_t m_nvmPageCache[NVMCTRL_PAGE_SIZE];
231 // The page cache gets written to NVM as 32-bit pieces
232 int32_t *m_nvmPageCache32;
233 WriteCacheState m_writeState;
234 uint8_t m_quadWordIndex;
235 bool m_pageModified;
236
242 NvmManager();
243
250 void PopulateCache();
251
260 bool WriteCacheToNvm();
261
269 bool WriteCacheToNvmProc();
270
271 bool BlockWrite();
272}; //NvmManager
273
274} // ClearCore namespace
275#endif // HIDE_FROM_DOXYGEN
276#endif // __NVMMANAGER_H__
Namespace to encompass the ClearCore board API.
Definition AdcManager.h:36